Dynamic random memory (DRAM) devices can be highly integrated as compared to other memory devices. However, because of leakage currents that result from the high integration, DRAM devices typically must be refreshed periodically in order to retain the stored data. As a result, DRAM devices consume power even in a standby state. In contrast, flash memory devices do not refresh memory cells in order to retain the stored data. However, flash memory devices operate relatively slowly, and a tunneling oxide layer in flash memory device may be damaged in operation.
New memory cells that have the advantages of both the DRAM and the flash memory devices have been studied. One such new memory device is a scalable two transistor memory (STTM) cell which is disclosed by Nakazato et al. in U.S. Pat. No. 5,952,692. The STTM cell may provide high speed, low power consumption and high integration. However, numerous problems may still exist with respect to commercial embodiments of STTM cells.